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Keynote & Invited Speakers

Invited talk 1: Shiro Kamohara, Renesas, "Ultralow-Voltage Design and Technology of Silicon-on-Thin-Buried-Oxide (SOTB) CMOS in IoT Era"

Abstract: Ultralow-voltage (ULV) operation of CMOS circuits is effective for significantly reducing the power consumption of the circuits. Although operation at the minimum energy point (MEP) is effective, its slow operating speed has been an obstacle. The silicon-on-thin-buried-oxide (SOTB) CMOS is a strong candidate for ultralow-power (ULP) electronics because of its small variability and back-bias control. These advantages of SOTB CMOS enable power and performance optimization with adaptive Vth control at ULV and can achieve ULP operation with acceptably high speed and low leakage. In this paper, we describe our recent results on the ULV operation of the CPU, SRAM, ring oscillator, and, other logic circuits. Our 32-bit RISC CPU chip, named “Perpetuum Mobile,” has a record low energy consumption of 13.4 pJ when operating at 0.35 V and 14 MHz. Perpetuum-Mobile micro-controllers are expected to be a core building block in a huge number of electronic devices in the internet-of-things (IoT) era.

Invited talk 2: Takeshi SHIMA, Kanagawa Univ., "New Design Methodologies for TDC and Programmable SC-DCDC Converter"

Abstract: In this report, two different analog circuit design methodologies are reported. One is the time to digital converter, TDC, the other is the programmable switched capacitor DCDC converter, PSC-DCDC. Concerning TDC, TDC using the coupled oscillator is carefully designed for finer conversion. As for PSC-DCDC, the continued-fraction expansion is introduced to generate arbitrary output voltages.

Invited talk 3: Hiroyuki Ito, Atsushi Shirane, Sho Ikeda, Yosuke Ishikawa, Noboru Ishihara and Kazuya Masu, Tokyo Institute of Technology, "Ultra-Low-Power RF Transceiver Technology for Sensor Network Application"

Abstract: This paper introduces ultra-low-power RF transceiver technology in our recent works: the IF-based quadrature backscattering technique (IF-QBT), and an RF-CMOS-transceiver IC-module employing an active mixer-first receiver (RX), an inverter-based resonant-driver and a current-reuse voltage controlled oscillator. The transceivers were fabricated in 65 nm Si CMOS technology. The transmitter (TX) with IF-QBT achieves 2.5 Mb/s, 32-QAM modulation while consuming 113 uW under 0.6-V power supply. The IC-module provides TX output power of -23.2 dBm and RX sensitivity of -61.2 dBm.

Invited talk 4:,,Shuhei Amakawa, Ryuhei Goda, Kosuke Katayama, Kyoya Takano, Takeshi Yoshida and Minoru Fujishima, Hiroshima University, "Power line decoupling up to 325 GHz in CMOS"

Abstract: Power line decoupling up to 325 GHz is shown to be realizable in CMOS with specially designed transmission line having an extremely low characteristic impedance.

Invited talk 5: Toshiro Hiramoto, The University of Tokyo, "Present Status of Characteristics Variability in Advanced MOSFETs"

Abstract: In this presentation, the present status of characteristics variability in advanced MOSFETs is reviewed, with a focus on the random variability in 11G bulk MOSFETs and the comparison of measured random variability in bulk MOSFETs with that in fully-depleted SOI MOSFETs.

Invited talk 6: Atsushi Muramatsu, Hong Gao and Hiroyuki Nakamoto, Fujitsu Laboratories Limited, "Thin and Flexible IoT-supporting Beacon Requiring No Battery Replacements"

Abstract: Today, for providing location service, wireless beacons attact many attentions. Conventional beacon requires power-supply components, such as power-management ICs and batteries. These components, which are relatively thick and large, make the beacons large, and limiting locations to which they can be attached. We developed power-control technology that temporarily deactivates the power monitor, which makes it possible to activate the beacon with the power from a solar cell. The need for conventional power-supply components are thus obviated, enabling beacons made of a few components to be operated. By mounting these components on thin, elastic silicone sheets, the beacon is thin and flexible, weighing 3-g with a thickness of 2.5-mm.,,This beacons is flexible enough for installation on round objects, and corners, such as the space between fluorescent bulbs in a ceiling, or the surface of an LED light.

Invited talk 7: Koichi Maezawa, University of Toyama,,"Ultrahigh frequency circuits and a novel integration technology for resonant tunneling diodes"

Abstract: Resonant tunneling diodes (RTDs) are promising devices for ultrahigh-frequency applications. However, there are some problems, such as bias instability, complex fabrication process, and cost. These problems prevent RTDs being used in practical applications. In this paper, we will discuss our attempts to overcome these problems, and also describe some applications of them.

Invited talk 8:,,Makoto Nagata, Kohki Taniguchi and Noriyuki Miura, Kobe University,,“Adaptive Suppression of Power Delivery Network Resonance with Chip-Package-Board Interaction”

Abstract: An adaptive technique of the resonance in power delivery network (PDN) for a large scale integration of systems in an IC chip and also with system packaging is introduced. The on-chip power noise monitoring and in-place power noise analysis tune on-chip power noise filter circuits. A prototype chip in a 0.18 um CMOS technology will be explored.

Invited talk 9: Hanpei Koike, Masakazu Hioki, Yasuhiro Ogasahara, Hayato Ishigaki, Toshiyuki Tsutsumi, Tadashi Nakagawa and Toshihiro Sekigawa, National Institute of AIST & Meiji University,,“Flex Power FPGA and AISTino”

Abstract: Flex Power FPGA features novel threshold voltage (Vt) programmability and can drastically reduce its static power by fine-grained body bias optimization among the circuit elements in the FPGA. We have been developing a series of Flex Power FPGA test chips using SOTB (Silicon On Thin BOX) technology, which is ideal for the maximum static power reduction performance and the minimum energy low voltage operation. In this paper, the overview of these test chip developments and the summary of their evaluation results are described. A new evaluation board called AISTino, equipped with the final version of the test chip, is also introduced as a good platform for the IoT applications.

Invited talk 10: Hitoshi Sugihara, Sao Noguchi, Kazunobu Morimoto,  Pham Tuong Hai and Ichiro Naka, Renesas Design Vietnam & Renesas Electronics Corporation, “Renesas Design Vietnam – A Successful Model in Building-Up the Semiconductor Industry at Vietnam”

Abstract: Conducting the feasibility study from 2003 and established in 2004 even when LSI design was still an unfamiliar word with most of Vietnamese people, but Renesas Design Vietnam (RVC) was targeted as a full range design center at Vietnam. This presentation share to audiences the background and expectation on the foundation of RVC, the challenge issues and development strategies, the local workforce and training scheme, the success and efforts, contribution, that RVC experiences through more than 10 years of development and growth. We close the presentation by a positive message to engineers who interest on semiconductor industry and wish to contribute to the prosperity of the region.