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The 7th International Conference on Integrated Circuits, Design, and Verification (ICDV 2017)

October 5-6, 2017 – Hanoi, Vietnam

Sponsored by
IEEE SSCS Vietnam Chapter, IEICE Vietnam Section
, IEEE SSCS Japan Chapter, IEEE SSCS Kansai Chapter, and the Radio-Electronics Association of Vietnam,
Hosted by VNU University of Engineering and Technology

The International Conference on Integrated Circuits, Design, and Verification (ICDV) provides an annual forum for exchanging ideas, discussing research results, and presenting chips, circuit designs and applications in solid-state and semiconductor fields. Continuous scaling of the CMOS devices increases the number of transistors on a VLSI chip. It will soon reach the level of 10 giga transistors on a single chip, which is equivalent to the total neuron numbers in the human brain. This would certainly provide us a great opportunity for new applications and information processing. On the other hands, the small feature size causes new problems such as leakage current and process variation. To discuss utilizing the scaling advantages and coping with the new problems, we call for contributions about new proposal of application systems, VLSI architectures, and design methodologies as well as the technologies in the integrated circuits and devices field. We expect to this conference explores and stimulates the contributed researches to those subjects. The papers are solicited from prospective authors interested in the related fields.
The ICDV 2017 conference is sponsored by the IEEE SSCS Vietnam, the IEICE Vietnam Section, the IEEE SSCS Japan/Kansai Chapter, the Radio-Electronics Association of Vietnam, hosted by VNU University of Engineering and Technology (VNU-UET), and will be held in Hanoi, Vietnam. Further details on the conference, paper submission guidelines, and templates will be updated on the website.

Paper Submission

Prospective authors are invited to submit full-length, six-page manuscripts, including figures, tables and references, to the official ICDV 2017 website. All papers will be handled electronically. Accepted and presented papers will be included in the conference proceedings with ISBN and will be submitted to the IEEE (the copyright shall be assigned to the IEEE) and will be invited to re-submit an extension to REV Journal on Electronics and Communications (JEC) and VNU Journal of Computer Science and Communication Engineering (JCSCE). Papers are solicited in the following categories, but are not limited to:
1.    Digital integrated circuits and signal processing
2.    Processors/ multiprocessors
3.    Memory design
4.    Analog and mixed-signal circuits
5.    RF integrated circuits and microwave engineering
6.    Circuit technologies
7.    Design experience with advanced design technologies
8.    Circuits/devices modeling, verification and testing
9.    Reconfigurable architectures & FPGA-based designs
10.    Embedded systems design
11.    IoT related circuits, devices and applications
12.    Rebooting computing

Important dates

  • Full manuscript submission:   July 10, 2017 extended to July 31, 2017 (hard deadline)
  • Notification of acceptance:     August 30, 2017 September 12, 2017
  • Camera-ready submission:     September 15, 2017 September 17, 2017